1. Field of the Invention
This invention is related to the field of integrated circuits and, more particularly, to packaging of integrated circuits.
2. Description of the Related Art
Integrated circuit chips are generally packaged to provide more convenient and reliable connection to other components such as a circuit board, to protect the integrated circuit from damage, etc. Originally, each integrated circuit chip was housed in its own package, which was soldered or otherwise electrically and physically connected to a circuit board to which other integrated circuits (each in their own packages) and other electronic components were also connected.
More recently, package-on-package connections have been used to reduce the size of the device that includes the integrated circuits. In such cases, a first integrated circuit is packaged in a package that includes pins to connect to a circuit board and which also includes mounting points that match the pins of another integrated circuit. The other integrated circuit can be mounted on the first integrated circuit via the mounting points.
Another strategy that is beginning to be used is chip-on-chip packaging. In chip-on-chip packaging, multiple integrated circuit chips are stacked and are connected directly to each other (e.g. without an intervening package). In one chip-on-chip solution, the chips are stacked in the same orientation (i.e. “face up”). The largest chip in the stack is on the bottom, and connection is made from the top of the largest chip up the sides of the smaller chips, e.g. via wire bond loops that extend from the pads on the smaller chips over the side of the smaller chips. The stacked chips are included in a single package for connection to other components. The chip-on-chip package provides a smaller over-all volume than the package-on-package solution.
Each packaging solution has associated risks as well. Package-on-package technology carries more risk (e.g. in terms of parts that do not operate correctly and must be disposed of at manufacture, in terms of earlier failure due to defects not yet apparent in a newer technology, in terms of early failure of the part due to a single chip failure, etc.) than mounting each individual packaged circuit to a circuit board. Chip-on-chip packaging carries more risk than package-on-package technology as well. Thus, a product designer makes tradeoffs in risk and product goals when considering the packaging of components of the product.